AT24C128

AT24C128 , I2C , 2-Wire Serial EEPROM 128Kbits (16,384 x 8) EEPROM

Shipping Starts from ₹59
SKU: IC-MEM-AT24C128
Stock Status: Sold Out
₹27.76
Including Tax: ₹4.24
This item is currently out of stock and can not be purchased.

Description

Description
The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable andprogrammable read only memory (EEPROM) organized as 16,384/32,768 words of 8bits each. The device’s cascadable feature allows up to 4 devices to share a commonTwo-wire bus. The device is optimized for use in many industrial and commercial appli-cations where low power and low voltage operation are essential. The devices areavailable in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJSOIC, 8-lead MAP (24C128), 8-lead TSSOP, 8-lead SOIC Array Package and 8-balldBGA2 packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and1.8V (1.8V to 3.6V) versions.

Datasheet Download

DEVICE/ADDRESSES (A1, A0): The A1 and A0 pins are device address inputs that are hard-wired or left not connected for hardware compatibility with other AT24CXX devices. When thepins are hardwired, as many as four 128K/256K devices may be addressed on a single bussystem (device addressing is discussed in detail under the Device Addressing section). If thepins are left floating, the A1 and A0 pins will be internally pulled down to GND if the capacitivecoupling to the circuit board VCC plane is <3 pF. If coupling is >3 pF, Atmel recommends con-necting the address pins to GND

AT24C128/256, 128K/256K SERIAL EEPROM: The 128K/256K is internally organized as256/512 pages of 64-bytes each. Random word addressing requires a 14/15-bit data wordaddress.

Features

• Low-Voltage and Standard-Voltage Operation
       –  2.7 (VCC = 2.7V to 5.5V)
       –  1.8 (VCC = 1.8V to 5.5V)
• Low-Power Devices (ISB = 2μA at 5.5V) Available
• Internally Organized 16,384 x 8 and 32,768 x 8
• 2-Wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 1 MHz (5V), 400 kHz (2.7V, 2.5V) and 100 kHz (1.8V) Compatibility
• Write Protect Pin for Hardware Data Protection
• 64-byte Page Write Mode (Partial Page Writes Allowed)
• Self-Timed Write Cycle (10 ms max)
• High Reliability
     –  Endurance: 1 Million Write Cycles
     –  Data Retention: 40Years
•Automotive Grade and Extended Temperature Devices Available
•8-Pin JEDEC PDIP, 8-Pin JEDEC SOIC, 8-Pin EIAJ SOIC, and 8-pin TSSOP Packages

Similar Products