AT24C512

The AT24C512 provides 524,288 bits of serial electrically erasable and programmableread only memory (EEPROM) organized as 65,536 words of 8 bits each. The device’scascadable feature allows up to four devices to share a common two-wire bus. Thedevice is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-pin PDIP, 8-lead EIAJ SOIC, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-leadLeadless Array (LAP), and 8-lead SAP packages. In addition, the entire family is avail-able in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 3.6V) versions.

Datasheet : Download

DEVICE/ADDRESSES (A1, A0): The A1 and A0 pins are device address inputs that arehardwired or left not connected for hardware compatibility with other AT24Cxx devices.When the pins are hardwired, as many as four 512K devices may be addressed on asingle bus system (device addressing is discussed in detail under the Device Address-ing section. If the pins are left floating, the A1 and A0 pins will be internally pulled downto GND if the capacitive coupling to the circuit board VCC plane is <3 pF. If coupling is>3 pF, Atmel recommends connecting the address pins to GND.

• Low-Voltage and Standard-Voltage Operation

       –  2.7 (VCC = 2.7V to 5.5V)

       –  1.8 (VCC = 1.8V to 5.5V)

• Low-Power Devices (ISB = 2μA at 5.5V) Available

• Internally Organized 65,536 x 8

• 2-Wire Serial Interface

• Schmitt Trigger, Filtered Inputs for Noise Suppression

• Bidirectional Data Transfer Protocol

• 1 MHz (5V), 400 kHz (2.7V, 2.5V) and 100 kHz (1.8V) Compatibility

• Write Protect Pin for Hardware Data Protection

• 128-byte Page Write Mode (Partial Page Writes Allowed)

• Self-Timed Write Cycle (10 ms max)

• High Reliability

     –  Endurance: 1 Million Write Cycles

     –  Data Retention: 40Years

•Automotive Grade and Extended Temperature Devices Available

•8-Pin JEDEC PDIP, 8-Pin JEDEC SOIC, 8-Pin EIAJ SOIC, and 8-pin TSSOP Packages