STC8G1K08-36I microcontroller

              STC8G series of microcontrollers are microcontrollers that do not need an external crystal oscillator and external reset circuit. They are 8051 core microcontrollers with the goal of strong anti-interference, ultra low price, high speed and low power consumption. Under the same operating frequency, STC8G series of microcontrollers are about 12 times faster (11.2 ~ 13.2 times) than traditional 8051. To execute all 111 instructions in sequence, the STC8G series microcontroller only needs 147 clocks, while the traditional 8051 requires 1944 clocks. STC8G series of microcontrollers are single clock/machine cycle (1T) microcontrollers produced by STC. It is a new generation 8051 microcontrollers with wide voltage, high speed, high reliability, low power consumption, strong antistatic, strong anti-interference and super encrypted. The instruction codes are fully compatible with traditional 8051.

              High precision of ±0.3% @+25°C R/C clock is integrated in MCU with -1.38% to +1.42% temperature drift under the temperature range of -40°C to +85°C, and 0.88% to +1.05% temperature drift under temperature range from -20°C to +65°C. The frequency of RC clock can be set from 4MHz to 35MHz when programming a MCU using ISP. Note: The maximum frequency must be limited below 35MHz when the temperature range is -40°C to + 85°C. Moreover, high reliable reset circuit with 4 level optional reset threshold voltage can be selected.So, external expensive crystal and the external reset circuit can be eliminated completely.There are three optional clock sources inside the MCU, internal high precision IRC which can be adjusted while ISP, internal 32KHz low speed IRC, external 4MHz~33MHz oscillator or external clock signal. The clock source can be freely chosen in user codes. After the clock source is selected, it may be 8-bit divided and then be
supplied to the CPU and the peripherals, such as timers, UARTs, SPI, and so on.

              Two low power modes are provided in MCU, the IDLE mode and the STOP mode. In IDLE mode, MCU stops clocking CPU, CPU stops executing instructions without clock, while all peripherals are still working. At this moment, the power consumption is about 1.0mA at 6MHz working frequency. The STOP mode is the
power off or power-down mode. At this momont, the main clock stops, CPU and all peripherals stop working,
and the power consumption can be reduced to about 0.6uA when VCC is 5.0V, 0.4uA when VCC is 3.3V.
The Power-down mode can be woke-up by one of the following interrupts: INT0(P3.2), INT1(P3.3),
INT2(P3.6), INT3(P3.7), INT4(P3.0), T0(P3.4), T1(P3.5), T2(P1.2), T3(P0.4), T4(P0.6), RXD(P3.0/P3.6/P1.6/
P4.3), RXD2(P1.4/P4.6), RXD3(P0.0/P5.0), RXD4(P0.2/P5.2), CCP0(P1.1/P3.5/P2.5), CCP1(P1.0/P3.6/P2.6),
CCP2(P3.7/P2.7), I2C_SDA(P1.4/P2.4/P3.3), Comparator, LVD, Power-down wake-up timer.
Rich digital peripherals and analog peripherals are provided in MCU, including UARTs, timers, PCAs,
PWMs and I2C, SPI, ultra-high speed ADC and comparator, which can meet the needs of users when designing
a product.
The enhanced dual data pointers are integrated in the STC8G series of microcontrollers. Using program
control, the function of automatic increasing or decreasing of data pointer and automatic switching of two sets
of data pointers can be realized.

Core
    • Ultra-high speed 8051 core with single clock per machine cycle, which is called 1T and is about 12 times faster than traditional 8051
    • Fully compatible instruction set with traditional 8051
    • 16 interrupt sources and 4 interrupt priority levels
    • Online debugging is supported
Operating voltage
    • 1.9 to 5.5V
    • Built-in LDO
Operating temperature
    • -40°C~85°C
Flash memory
    • Up to 17K bytes of Flash memory to be used to store user code
    • Configurable EEPROM size, 512bytes single page erased, can be repeatedly erased more than 100 thousand times.
    • In-System-Programming, ISP in short, can be used to update the application code, no need for programmer.
    • Online debugging with single chip is supported, and no emulator is needed. The number of breakpoints is unlimited theoretically.
SRAM
    • 128 bytes internal direct access RAM
    • 128 bytes internal indirect access RAM
    • 1024 bytes internal extended RAM
Clock
    • Internal high precise R/C clock (IRC, range from 4MHz to 36MHz), adjustable while ISP and can be divided to lower frequency by user software, 100KHz for instance
    – Error:±0.3% (at the temperature 25℃)
    – -1.38%～+1.42% temperature drift (at the temperature range of -40°C to +85°C)
    – -0.88%～+1.05% temperature drift (at the temperature range of -20℃ to 65℃)
    • Internal 32KHz low speed IRC with large error
    • External 4MHz~33MHz oscillator or external clock
    • The three clock source above can be selected freely by used code.
Reset
    • Hardware reset
    – Power-on reset. Measured voltage value is 1.69V~1.82V. (Effective when the chip does not enable the low voltage reset function) The power-on reset voltage is a voltage range consisting of an upper limit voltage and a lower limit voltage. When the operating voltage drops from 5V / 3.3V to the lower limit threshold voltage of the power-on reset, the chip is in reset state. When the voltage rises from 0V to the upper threshold voltage of power-on reset, the chip is released from the reset state.
    – Reset by reset pin. The default function of P5.4 is I/O port. P5.4 pin can be set as the reset pin while ISP download. (Note: When the P5.4 pin is set as the reset pin, the reset level is low.)
    – Watch dog timer reset
    – Low voltage detection reset. 4 low voltage detection levels are provided, 2.2V (Measured as 1.90V~2.04V), 2.4V (Measured as 2.30V~2.50V), V2.7 (Measured as 2.61V~2.82V), V3.0 (Measured as 2.90V~3.13V). Each level of low-voltage detection voltage is a voltage range consisting of an upper limit voltage and a lower limit voltage. When the operating voltage drops from 5V / 3.3V to the lower limit threshold voltage of low-voltage detection, the low-voltage detection takes effect. When the voltage rises from 0V to the upper threshold voltage, the low voltage detection becomes effective.
    • Software reset
    – Writing the reset trigger register using software
Interrupts
    • 16 interrupt sources: INT0, INT1, INT2, INT3, INT4, timer0, timer1, timer2, uart1, uart2, ADC, LVD, SPI, I2C, comparator,PCA/CCP/PWM
    • 4 interrupt priority levels
    • Interrupts that can awaken the CPU in clock stop mode: INT0 (P3.2), INT1 (P3.3), INT2 (P3.6), INT3 (P3.7), INT4 (P3.0), T0 (P3.4) ), T1(P3.5), T2(P1.2), RXD(P3.0/P3.6/P1.6), RXD2(P1.4), CCP0(P1.1/P3.5), CCP1 (P1.0/P3.6), CCP2 (P3.7), I2C_SDA (P1.4/P3.3) and comparator interrupt, low-voltage detection interrupt, power-down wake-up timer.
Digital peripherals
    • 3 16-bit timers: timer0, timer1, timer2, where the mode 3 of timer 0 has the Non Maskable Interrupt (NMI in short) function. Mode 0 of timer 0 and timer 1 is 16-bit Auto-reload mode.
    • 2 high speed UARTs: uart1, uart2, whose baud rate clock source may be fast as FOSC/4
    • 3 groups of PCAs: CCP0, CCP1, CCP2, which can be used as capture, high speed output and 6-bits, 7-bits, 8-bits or 10-bits PWM.
    • SPI: Master mode, slave mode or master/slave automatic switch mode are supported.
    • I2C: Master mode or slave mode are supported.
    • MDU16: Hardware 16-bit Multiplier and Divider which supports 32-bit divided by 16-bit, 16-bit divided by 16-bit, 16-bit by 16-bit, data shift, and data normalization operations.
Analog peripherals
    • 6 channels (channel 0 to channel 5) ultra-high speed ADC which supports 10-bit precision analog-to-digital conversion, the speed can be as fast as 500K(500,000 conversions per second).
    • ADC channel 15 is used to test the internal reference voltage. (The default internal reference voltage is 1.19V when the chip is shipped)
    • DAC. 3 groups of PCAs can be used as DAC.
GPIO
    • Up to 18 GPIOs: P1.0~P1.7, P3.0~P3.7, P5.4~P5.5
    • 4 modes for all GPIOs: quasi-bidirectional mode, push-pull output mode, open drain mode, high-impedance input mode
    • Except for P3.0 and P3.1, all other I/O ports are in high-impedance state after power-on. User must set the I/O ports mode before using them. In addition, each I/O can independently enable the internal 4K pull-up resistor.
Package
    • TSSOP20，QFN20， SOP16，SOP8， DFN8